Since its inception, the technology of writing with wire (scribing) has improved dramatically in the areas of quality, performance and most significantly, density. For example, in the 1970's 6.3 mil wire was the standard size allowing for densities up to 40 inches of conductor per square inch. In the early 1980's 4 mil wire, which allowed for a density of up to 80 inches of conductor per square inch, was becoming accepted in the marketplace. As of the late 1980's densities of up to 160 inches of conductor per square inch were possible with the use of 2.5 mil wire. For the most part, these density improvements have been motivated by the market's need for smaller and more powerful computers and by the availability of more sophisticated integrated circuits.
The basic scribed wire technique is described in U.S. Pat. No. 3,674,914 to Burr. The insulated wire, as it is written or scribed, is fixed or tacked by a heat sensitive, adhesive surface on the substrate by means of a scribing or tacking head. The head guides the wire and heats or energizes the sensitive surface as the wire is brought into engagement. The preferred technique for tacking the scribed wire is through the use of ultrasonic energy. The wire passes beneath a grooved stylus which is used to position the wire. Ultrasonic energy is applied to the stylus to activate the adhesive layer beneath the wire and to push the wire into the adhesive layer. After the tacked or scribed wire pattern is complete on the board surface, the pattern is fixed by coating the board with an encapsulating layer. Thereafter, holes are drilled in the board at the conductor run terminations and the holes are plated to provide for surface connections to electronic components.
In recent times the electronics industry has moved toward more compact integrated circuit packages with surface-mounted terminals. In the new packaging the distance between adjacent edge connections is 20 mil or less. Not only are the connection points closer together, but the density of the wiring pattern must also be substantially increased. In order to achieve the increased density the wire size must be finer and is preferably 42 AWG wire with a 2.5 mil diameter. The hole diameter of the surface terminals is preferably reduced to about 8 mil and achieved through laser drilling.
Each improvement, however, was accompanied by technical challenges that had to be overcome in order to maintain production efficiency and product quality. These challenges have been addressed in three major areas of design, materials, and machinery enhancements. However, some manufacturing system defects still persist. For example, to date visual inspection during the scribing operation has been the only way to determine wiring quality and integrity in real time prior to completion of the circuit board. This visual inspection is not only time consuming and labor intensive, but is also completely unreliable given the extremely small, state-of-the-art, 2.5 mil wire and the dense layered construction of state-of-the-art circuit boards.
One common defect that eludes timely detection with the present inspection techniques has been unintentional breaks in the scribed wire. The incidence of unintentional breakage increases as the diameter of the wire used decreases. Conventional technology allows a manufacturer to electronically inspect and test the product after it is completed. Obviously, if there have been any irregularities produced during the scribing process, nothing can be done but to dispose of the board. Considering the cost increase in producing higher density boards, faults or irregularities can become extremely wasteful and time consuming. Some examples of prior art patents that have attempted to test the board after the product is completed are represented on U.S. Pat. No. 3,975,680 (Webb, 1976), and in U.S. Pat. No. 4,565,966 (Burr et al., 1986).
Alternatively, the manufacturing process could be interrupted at predetermined intervals during which the boards are inspected electronically. This type of periodic evaluation, however, results in an increase in the production time for each circuit board making the process inefficient.